A Virtualized, Programmable Content Delivery Network
After that, the coupled substrate noise will be analyzed in detail in both the time and frequency domains to gain more insight with respect to the origin and mechanism of coupling for the two different types of logic architectures.Although it may seem that a circuit designer may not be interested in the exact shape of the noise for such a simple circuit, a better understanding of this will provide insight about the substrate noise that can be expected from larger, more general designs. Finally, the effectiveness of commonly used techniques to reduce substrate noise such as using a lightly-doped substrate or employing guard rings will be explored with additional measurement results. The substrate noise when the die was packaged in a package is.
For these measurements, the CBL PRNG is clocked at, which is A Virtualized, Programmable Content Delivery Network the equivalent operating speed of the NCL PRNG determined experimentally from measurement. The time domain plot shows the obvious differences between the noise generated by the synchronous and asynchronous logic. A Virtualized, Programmable Content Delivery Network As seen in this plot, the substrate noise generated by the CBL PRNG is much greater than that caused by the NCL PRNG. In terms of numerical values, the RMS noise voltage from the NCL PRNG lower.
A Virtualized, Programmable Content Delivery Networks
Noticeable features of this plot can be seen in the form of repetitive noise spikes corresponding to the edges of the CBL clock. A Virtualized, Programmable Content Delivery Network Slightly different peak magnitudes in the train of noise spikes can be attributed to the pseudo-random switching nature of this block. The corresponding frequency spectra of the CBL and NCL PRNG substrate noise measurements can be seen in closer look at these plots reveals information that is not visibly obvious in the time domain measurements, especially for the asynchronous case. As expected, there are large tones present in the CBL PRNG frequency spectrum at the CBL clock frequency and its harmonics. In the NCL frequency plot, the spectrum is quite evenly spread across the frequency range. This trend is consistent with the asynchronous nature of the circuit. However, there are noticeable tones at and its harmonics. As will be discussed later, these tones actually reflect the equivalent operating speed of the NCL PRNG. Note that unlike the synchronous measurement where there are sharp tones at the clock frequency harmonics, these tones seem to exhibit a skirting effect
This skirting is a signature characteristic of NCL circuits as a result of localized switching. shows a closer look at the ringing characteristics of the two PRNGs in the time domain. As seen in top plot, the CBL PRNG substrate noise waveform shows two distinct ringing frequencies. The slightly higher frequency component is due to coupling from the clock source through the input bond-pad, interconnect, and transistor junction capacitances. This component of the noise was verified through measurement with power to buffers and the power to the PRNGs turned off. Since this portion of the noise is the result of capacitive coupling, it is heavily dependent on both the rise time of the input clock source and the parasitic of the package and PCB. For this setup, a data timing generator with a signal rise time of ns was used for the clock signal. The other component of the substrate noise from the CBL PRNG are the larger spikes in the measurement at a slightly lower frequency. This is the portion due to the switching of the PRNGs. A Virtualized, Programmable Content Delivery Network In this plot, it can be seen that the noise does not completely settle before each subsequent transition.