As expected, the tones due to the instruction cycle loop are no longer present in either spectrum. For further analysis, the synchronous and asynchronous were loaded with programs that exploit different classes of instructions: Developing a cost-effective OpenFlow testbed for small-scale Software Defined Networking the rand program uses pseudo-random loop lengths, the add program exploits the ADD instruction, the logic program contains various Boolean instructions, the transfer program writes to the RAM, and the arithmetic program consists of multiply and increment instructions. The results of this experiment are shown in Developing a cost-effective OpenFlow testbed for small-scale Software Defined Networking As seen in this table, the differences in the measured substrate noise are not significantly different for different classes of instructions. The programs with the largest RMS noise are the transfer and the add programs and the program with the lowest RMS noise is the arithmetic program. This trend again suggests that the RAM is the most dominant block since the former program requires frequent memory accesses while the latter does not. SUBSTRATE NOISE EFFECTS ON A DSM Developing a cost-effective OpenFlow testbed for small-scale Software Defined Networking The analysis thus far has been exclusively focused on the measured waveform in the substrate.However, the ultimate goal of substrate noise analysis is to determine the detrimental effects of this noise to other circuitry. In this section, the effects of substrate noise on the signal-to-noise ratio SNR performance of a DSM is examined when the CBL and NCL are used as noise generators.Afully differential second-orderDSM, , was also included on the chip with the CBL and NCLfor this analysis. For this DSM, a sampling frequency was used with an OSR of The nominal DSM SNR with substrate noise from the synchronous clocked Developing a cost-effective OpenFlow testbed for small-scale Software Defined Networking close to the DSM sampling frequency. SNR of this delta-sigma was found to be for an input signal of. Measurement of the DSMwith the asynchronous active showed no noticeable effect on the SNR performance. However, the same was not found to be true when the synchronous was active. shows the nominal DSM spectrum and the spectrum when the CBL is clocked at below the sampling frequency. As seen in this figure, there are a lot of noise tones in the passband of the DSM spectrum. These noise tones are apart which indicates that this noise is most likely aliasing noise. In order to verify this, a series of measurements was made with the DSM when the clock frequency was swept around the DSM sampling frequency. shows the measurement with the CBL clock swept above and below the sampling frequency. As seen in this plot, SNR degradation up to occurs for a narrow band around the DSMclock. In fact, the width of the dip in this SNR sweep is equal to twice the input band of the DSM. Noise outside of this band will also be aliased down, but since it will fall outside the input frequency band, it does not affect the DSM performance. One anomaly in this curve is when the CBL Developing a cost-effective OpenFlow testbed for small-scale Software Defined Networking clock is exactly equal to the DSM sampling frequency. At this point, all of the aliasing noise wraps down to DC and can easily be removed, leaving the DSM SNR largely unaffected. This result is consistent with previously published work Since the degradation in SNR performance is due to aliasing, it was also confirmed that the behavior seen in was generally true whenever the noise frequency was close to integer multiples of the DSM sampling frequency. Developing a cost-effective OpenFlow testbed for small-scale Software Defined Networking